Dhruvil Mistry

Dhruvil Mistry

I am an AI Engineer based in Mumbai, India, who bridges the gap between sophisticated machine learning capabilities and robust, user-facing software. I specialize in designing and shipping production-grade AI systems, specifically LLM agents, RAG (Retrieval-Augmented Generation) pipelines, and full-stack web architectures.

My journey began as a Full Stack Web Designer on the Contra Platform, where I delivered over 10 client applications, achieved a 95% client satisfaction rate, and developed reusable design systems that accelerated delivery times by 30%. This background instilled a deep appreciation for UI/UX detail, clean code, and rapid product shipment.

Driven by a curiosity for cognitive computing, I transitioned into AI and machine learning. During my internship at Infosys Springboard, I worked on end-to-end preprocessing pipelines and ML workflows, containerizing processes with Docker and integrating them into production-grade CI/CD pipelines, which reduced overall model error rates by 20%.

My projects reflect a focus on real-world utility and engineering performance. For instance, I built **Minutz**, an invisible browser-native meeting recorder that captures audio streams directly via WebRTC, processing transcription and action item extraction through a parallelized FastAPI and OpenAI Whisper pipeline. I also engineered **Saral AI**, a low-latency voice receptionist that automates inbound calls over full-duplex WebSocket connections with sub-second response times using Sarvam AI and Groq LLM.

I share my findings and engineering workflow as a technical content creator on LinkedIn, where I connect with a community of over 3,000 developers and founders. I am currently finishing my Bachelor of Engineering in Electronics & Telecommunications at MCT Rajiv Gandhi Institute of Technology.